Diverity Saturday -- Computer Opcode Diversity

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Prompt

A large desk, containing various computers. At the top of the picture is the caption: "Diversity Saturday, April 4th. Diversity in Computers."

More about Diverity Saturday -- Computer Opcode Diversity

In the 1970's and 1980's there were many diverse computers with a variety of strange and unconventional opcodes and instruction sets. For example the ICL 1900 mainframe had a 24bit wordsize, which could be addressed as four 6bit characters using the top two bits of the address as a character index. The CDC 6400 had eight data registers X0 to X7 (accumulators) each having an associated address register (A0 to A7), writing to A0 to A5 updated the data register X0 to X5 from store, while writing to A6 to A7 wrote the relevant data register X6 to X7 back to store. The DEC PDP11 had no I/O instructions, mapping all devices into the top 4K of memory address space. It also had eight accumulators, R0 to R7, with R6 as the stack pointer and R7 as the program counter. The Z80 had dedicated bit set/clear instructions and block move instructions. The 80x86 had many hidden instructions, such as POPCNT which counted the number of onebits in a byte or word, and a set of matrix instructions (MMX). The Burroughs 5500 had an Algol mode and a Cobol mode instruction set. The Honeywell 58 had a set of translate table instructions to convert data blocks between ASCII and EBCDIC. And the 6502 had some very useful indirect indexing modes, allowing page zero to behave as pairs of base registers indexing off of the X or Y registers. Most of the processors also had Supervisor Call or Interrupt instructions (PDP11: EMT, TRAP; 80x86: INT; 6502: BRK; ICL 1900: PERI, etc). Unusually the CDC 6400 had no interrupt calls, relying on a barrel of 10 "peripheral processors" to run the operating system in the background, while the main program ran on the 6400 itself.

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